There have been several attempts to come to a generic naming convention that describes standard packages in a more precise and less ad-hoc way. The one that has gained widest acceptance, is IPC-7351B “Naming Conventions for Standard SMT Land Patterns”. This standard is not without its flaws, though: internal inconsistencies and ambiguous descriptions make the standard open to interpretation. These were set out to be fixed in the updated IPC-7351C standard, but the work on this update stalled, the IPC workgroup disbanded and the new workgroup has not held a meeting for the past four years.
A draft for the proposed updates for the chapter on the package naming convention, though, was published by the author of that chapter —the “Library Expert Footprint Naming Convention”. It is available from https://www.pcblibraries.com/, requiring a free registration. Despite being an unofficial standard, this draft document is considered the current IPC naming convention. For a summary, see topic IPC-7351 summary, and also see the examples.
A contender is JEITA standard ED-7303C “Name and code for integrated circuits package” (originally an EIAJ standard; JEITA is the successor of EIAJ). ED-7303 is more limited than IPC-7351, because it only deals with packages for integrated circuits. The advantage, however, is that the naming convention stays closer to the industry-standard names like TSSOP and LQFP. Codes for pitch, span, or body sizes are affixed at the end as needed. See topic ED-7303 summary for an overview,and also see the examples.
Of mention is furthermore the JEDEC standard JESD30 “Descriptive Designation System for Electronic-device Packages”. This is an elaborate standard that tries to describe every feature of a package. The resulting package names are cryptic, though, and it does not appear that this standard is active use. Curious, in this respect, is that JEDEC also maintains a large collection of design drawings for electronic packages, categorized as a two-letter prefix plus a sequence number (plus an optional suffix), where the prefix is “DO” for diodes, “TO” for transistors, and “MO” or “MS” for integrated circuits. These drawings “reference labels” are actually in common use (e.g. DO-219AA as an alias for SOD123, or TO-252 as an alias for DPAK). Yet, JESD30 ignores these reference drawings and restarts from scratch.
Lastly, none of the above standards covers manufacturer-specific packages (and footprints), such as those for connectors, submodules and special components. As a result, there are no standard names for these packages either. The common convention is that these packages are named:
Manufacturer Name + “_” + Product Number
An example of the above convention is CUI_PJ-001AH-67. —a SMT mounted DC power connector manufactured by CUI.
The product number may contain wild-card characters (typically an “x”), in case there is a range of components that all use the same package.
In the 1980s, the various standardization organizations for the electronics industry came to an agreement to move to metric and specify the dimensions in all future standards in millimetres. However, when the (USA-based) EIA published the PDP-100 standard on the “chip” packages (for surface mount resistors, capacitors, ferrite beads and other 2-pin parts) in 1987, the backlash from the USA industry was such that the EIA back-pedalled on its decision and republished the standard a year later with dimensions in both imperial and metric.
The trouble is: the EIA also chose to identify the packages by their size. For example, the 0805 package is a chip with a length of 8/100th inch and a width of 5/100th inch. In other words, the package’s label is simply its dimensions in the 2D plane in increments of 0.01 inch. In metric, this size is roughly 2.0 × 1.25 mm. That same 0805 package can also be labelled 2012 —again the length and width of the package, but now in increments of 0.1 mm. Both 0805 and 2012 refer to the same package; both are valid, standardized names for one and the same package; both are in active use, although imperial is more common than metric (especially in the USA).
A complication is that you cannot tell from looking at the package name alone, whether it should be interpreted as imperial or metric. At this time, there does not exist a package with the imperial size of 2012, so in this case you can make an educated guess that 2012 must be interpreted as metric. However, conflicts do exist: 0603, 0402 and 0201 are valid imperial sizes for a package as well as a valid metric sizes —but the metric packages being more than twice as small as their imperial counterparts with the same moniker.
| Imperial | Metric | Body size |
|---|---|---|
| 008004 | 0201 | 0.25×0.125 mm |
| 01005 | 0402 | 0.4×0.2 mm |
| 0201 | 0603 | 0.6×0.3 mm |
| 0402 | 1005 | 1.0×0.5 mm |
| 0603 | 1608 | 1.6×0.8 mm |
| 0805 | 2012 | 2.0×1.25 mm |
| 1008 | 2520 | 2.5×2.0 mm |
| 1206 | 3216 | 3.2×1.6 mm |
| 1210 | 3225 | 3.2×2.5 mm |
| 1808 | 4520 | 4.5×2.0 mm |
| 1812 | 4532 | 4.5×3.2 mm |
| 2010 | 5025 | 5.0×2.5 mm |
| 2012 | 5032 | 5.0x3.2 mm |
There was some hope, roughly twenty years ago, that the schism between metric and imperial would be resolved, because the EIA suspended its yearly updates to the PDP-100 standard in 1995, due to it being “in revision”. It never materialized, though (and neither were the updates resumed). The EIA ceased its operations in 2011.
A convention that is increasingly applied (but not yet universal) is to add an “M” suffix to the metric specifications of the packages. Thus, we speak of 0805 and 2012M.
IPC-7351 touts itself as a standard for “land patterns” (footprints), and it adds a suffix at the end of every footprint name to indicate the desired density of the assembly. A high density imposes a smaller footprint, and thus IPC-7351 identifies each package with three different labels for three standardized densities: Nominal, Least and Most —where “least” is for the footprint with the least spacing and the smallest pads, so for the highest density. In its label, the last letter (“N”, “L” or “M”) indicates the density. The density is not relevant for a package description, therefore this letter may be dropped on the package name or variant name.
Dimensions are in 1/100th of a millimetre. The X, Y and Z dimensions are separated with an “X”, and the “X” and “Y” dimensions refer to the lead-to-lead size. For the X and Y dimensions, the value is the nominal size; for the X dimension, the value is the maximum size. For example, a 20-pin TSSOP package (with standard 0.65 mm pitch) is named as SOP20P65_650X640X110. You can dissect this name as:
However, for packages for discrete components, IPC-7351 switches to the (metric) convention of PDP-100, which is 1/10th of a millimetre, and drops the “X” between the X and Y dimensions. For example, a common “chip” style resistor is RESC2012X50N, which we can dissect as:
The inclusion of the component type in the package name leads to a proliferation of package/footprint specifications that all are essentially identical —the type of a component is neither relevant for the package, nor for the footprint.
ED-7303 limits itself to packages for integrated circuits. For discrete semiconductors, JEITA suggests using the “SC” codes (separate JEITA standards). No guideline is given for discrete passive components, but EIA PDP-100 is the obvious choice. However, that still does not solve the issue of metric versus imperial.
The recent ED-7303 standard specifies the package sizes in millimetres. These are plain millimetres, not scaled millimetres like in IPC-7351. Also in contrast to IPC-7351 is that ED-7303 specifies the dimensions of the body of the package, rather than the lead-to-lead size. However, ED-7303 comes of age: the original specification is from June 1998, and it carries that history in the form of legacy notations that are now redundant and no longer recommended —yet still valid. This manual restricts itself to summarizing the recommended standard.
The height of the package is encoded in a prefix to the general package name. For example, VQFP is a QFP with a height between 0.8 mm and 1.0 mm; see the table below.
| Code | Description | Seated height |
|---|---|---|
| L | Low profile | 1.2 mm < L ≤ 1.7 mm |
| T | Thin | 1.0 mm < T ≤ 1.2 mm |
| V | Very thin | 0.8 mm < V ≤ 1.0 mm |
| W | Very very thin | 0.65 mm < W ≤ 0.8 mm |
| U | Ultra thin | 0.5 mm < U ≤ 0.65 mm |
| X | Extremely thin | X ≤ 0.5 mm |
Other prefixes flag features like the presence of an exposed-pad (“H”), or bumpered corners (“B”). Multiple prefixes can be chained.
An example for a package code according to ED-7303 is P-HTSSOP24-7.8x4.4-0.65, which means:
The material code (“P-” in the above example) is required according to the standard, but actually superfluous —so it is, in fact, often omitted.
| IPC-7351C (draft) ① | ED-7303C / JEITA | Description |
|---|---|---|
| RESC2012X50 ② | 0805 imperial, resistor, 2.0×1.25 mm, 0.5 mm high (max.) | |
| CAPC1608X80 ② | 0603 imperial, capacitor 1.6×0.8 mm, 0.8 mm high (max.) | |
| CAPMP3216X120 ② | polarized capacitor in molded package (e.g. tantalum capacitor), 2.0×1.25 mm, 1.2 mm high (max.) | |
| CAPAE660X610 ② | aluminium electrolytic capacitor, case D, lead span 6.6 mm (body 6.3 mm), 6.1 mm high | |
| BEADC2012X60 ② | 0805 imperial, ferrite bead, 2.0×1.25 mm, 0.6 mm high (max.) | |
| INDM4240X350 ② | power inductor in molded package, 4.2×4.0 mm lead-to-lead size, 3.5 mm high (max.) | |
| RESCAV10P65_3216X50 ② | 0612-10 imperial, resistor array, 10 pins, 1.6×3.2 mm, 0.5 mm high | |
| CFP6P65_2012X70 | 0508-6 imperial, ceramic flat package (6 pins), 1.25×2.0 mm, 0.7 mm high | |
| DIOM5538X262 ② | SOD132, DO-214AA | |
| DIOMELF5025 ② | SOD87, DO-213AB, MELF package | |
| LEDC3216X110 ② | LED in chip package (1206 imperial), may have a dome | |
| SOD3816X110 | SC-109D ③ | SOD123, DO-219AA |
| SOT6P65_210X110 | SC-70-6 ③ | SOT363, MO-203AB |
| DPAK3P230_1000X230 | SC-63 ③ | DPAK, TO-252 |
| XTALDFN2520X50 ② | 4-pin crystal, no-lead, body 2.0×2.5 mm | |
| SOP20P65_650X640X110 ⑤ | P-TSSOP20-6.5x4.4-0.65 ④ | TSSOP 20-pin, 0.65 mm pitch, 6.5×4.4 mm body size, 6.5×6.4 mm lead-to-lead, 1.1 mm height |
| SOIC8P127_495X600X175T330X240 ⑤ | P-HSOIC8-3.8x4.95 ④ | SOIC 8-pin with exposed-pad, 1.27 mm pitch, 3.8×4.95 mm body size, 6.0×4.95 mm lead-to-lead, 1.75 mm height |
| QFP48P50_900X900X110 ⑤ | P-TQFP48-7x7-0.50 ④ | QFP 48-pin, 0.5 mm pitch, 7×7 mm body size, 9×9 mm lead-to-lead size, 1.1 mm height |
① The last letter in an IPC-7351 “land pattern” name is a code for the footprint density. It is usually “N”, which stands for nominal, but may also be “L” (least) or “M” (most). It is not relevant for package names, and therefore has been omitted in these examples.
② IPC-7351 includes the component category in the name (CAP for capacitor, RES for resistor, etc), even though this is irrelevant for both the package and the footprint.
③ JEITA ED-7303 standardizes only package codes for integrated circuits. For discrete components, the standard refers to separate JEITA standards, notably ED-7500B.
④ The first letter of a package name in ED-7303 indicates the material for the body, like “P” for plastic or “C” for ceramic. The standard asserts this prefix is mandatory; it is irrelevant for the package dimensions, however, and is frequently omitted.
⑤ IPC-7351 uses the lead-to-lead size of a package, whereas ED-7303 uses the body size. Furthermore, for these packages, IPC-7351 changes its notation for the size.